PIC18F2610-I/SP【PDF 70/234 页】IC MCU FLASH 32KX16 28-DIP

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Sheet目录3822

66页 67页 68页 69页 [70页]71页 72页 73页 74页

2009 Microchip Technology Inc.

DS39636D-page 163

PIC18F2X1X/4X1X

REGISTER 16-3:

SSPSTAT: MSSP STATUS REGISTER (I2C MODE)

R/W-0

R-0

SMP

CKE

D/A

R/W

bit 7

bit 0

bit 7

SMP: Slew Rate Control bit

In Master or Slave mode:

1 = Slew rate control disabled for Standard Speed mode (100 kHz and 1 MHz)

0 = Slew rate control enabled for High-Speed mode (400 kHz)

bit 6

CKE: SMBus Select bit

In Master or Slave mode:

1 = Enable SMBus specific inputs

0 = Disable SMBus specific inputs

bit 5

D/A: Data/Address bit

In Master mode:

Reserved.

In Slave mode:

1 = Indicates that the last byte received or transmitted was data

0 = Indicates that the last byte received or transmitted was address

bit 4

P: Stop bit

1 = Indicates that a Stop bit has been detected last

0 = Stop bit was not detected last

Note:

This bit is cleared on Reset and when SSPEN is cleared.

bit 3

S: Start bit

1 = Indicates that a Start bit has been detected last

0 = Start bit was not detected last

Note:

This bit is cleared on Reset and when SSPEN is cleared.

bit 2

R/W: Read/Write bit Information (I2C mode only)

In Slave mode:

1 = Read

0 = Write

Note:

This bit holds the R/W bit information following the last address match. This bit is only

valid from the address match to the next Start bit, Stop bit or not ACK bit.

In Master mode:

1 = Transmit is in progress

0 = Transmit is not in progress

Note:

ORing this bit with SEN, RSEN, PEN, RCEN or ACKEN will indicate if the MSSP is

in Active mode.

bit 1

UA: Update Address bit (10-Bit Slave mode only)

1 = Indicates that the user needs to update the address in the SSPADD register

0 = Address does not need to be updated

bit 0

BF: Buffer Full Status bit

In Transmit mode:

1 = SSPBUF is full

0 = SSPBUF is empty

In Receive mode:

1 = SSPBUF is full (does not include the ACK and Stop bits)

0 = SSPBUF is empty (does not include the ACK and Stop bits)

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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